Looking for PP 6L6 circuit to use with Stancor A-3801 transformers

[Selmerdave]

Thanks guys!

I found this thread yesterday.


https://audiokarma.org/forums/index.php?threads/stancor-a3830-universal-output-transformers.756040/

Post #12 really discourages me from doing anything with these transformers other then selling them and using funds for better iron.

Despite the model number sounding a bit similar, the universal transformer in that thread is very different than yours. It's a very small, 1.8lb open-frame transformer with multiple primary taps.

I use-3311s in a pair of amps, which are a rough equivalent of yours but 25W, with very good results. So I wouldn't make any comparisons to a universal OPT.

 

[grindfix]

Despite the model number sounding a bit similar, the universal transformer in that thread is very different than yours. I use A-3311s in a pair of amps, which are a rough equivalent of yours but 25W, with very good results. So I wouldn't make any comparisons to a universal OPT.

I don't have expertise to compare any of them. In post #12 of that thread, poster states that he had several transformers tested and one of them was A-3801, which tested poorly against ones that were made for hifi applications

 

[grindfix]

https://audiokarma.org/forums/index.php?threads/the-1625-amp-mk-ii.778418/
(see post #1 for schematic)

Kevin--
Few more questions please.

1. Resistor with cap in series across PT secondaries - some kind of Icing on the cake stabilization network? I don't think there is an option in PSUD2 for that, unless it has no effect on voltage / current output
2. Why 2 x 50/500v caps in parallel but not single 100/500v?
3. 500/500v? I don't think I ever seen such a high capacitance in tube amp plus I don't see one available either
4. Any special heatsinks for TH1210 rectifiers? How hot are they getting?

Amp chassis is at work and I forgot to bring my RMS meter from home. I'll take PT measurements tomorrow and will start planning in PSUD. Thanks for your help!

 

[kward]

Answers--

1. It's a snubber. It tames transient spikes from rectification. Needing it or not depends on the power supply. It doesn't hurt to add it regardless. It consumes basically no power.

2. I used a JJ dual cap in one can, at 50 uF each, 500V rating: https://www.tubesandmore.com/products/capacitor-jj-electronics-500v-5050-f-electrolytic. But you can use a 100 uF 500V cap just as well. I used it because I had it available, but it does help to have two caps there since that cap, being the first cap in the filter chain, sees the full ripple current. It's good to put a beefy cap there that can handle the ripple current.

3. The 500 uF/500V cap is another JJ can cap: https://www.tubesandmore.com/products/capacitor-jj-electronics-500v-500-f-electrolytic. But you can use pretty much any 470 uF 500V cap just as well.

4. No heatsinks needed on the rectifiers. I just wired them directly to a solder lug strip. They don't get hot enough to need heat sinking. The only reason I used them is because I had them, although they do offer fast switching and soft recovery. You could equivalently use UF4007 axial types. Make sure whatever diodes you use are at least 1A and 1KV inverse voltage rated. If you want to put in the best, you could use Schottky diodes. They are significantly more expensive though.

 

[grindfix]

Make sure whatever diodes you use are at least 1A and 1KV inverse voltage rated. If you want to put in the best, you could use Schottky diodes. They are significantly more expensive though.

Something like this?

https://www.mouser.com/ProductDetai...TKtFS/BUuz6Zx2fl0mK9rgaNC5RRw%2B0AduA%2BLHA==

 

[nerdorama]

I'm using a pair of these SiC Schottky diodes in a Citation V remodel. Haven't got it ready for power on yet.

 

[grindfix]

I'm using a pair of these SiC Schottky diodes in a Citation V remodel. Haven't got it ready for power on yet.

Interestingly, Jim McShane suggested to try to build Citation V circuit around those original Stancor transformer. I'm just too skeptical in my abilities to make those OPTs to behave.

 

[kward]

Yeah, those diodes look like they would work. Interestingly they are not more expensive than the STTH1210's I used in mine. I thought they would be more like 5 bucks a piece or something.

Maybe it's the Cree's that are the expensive ones....

 

[nerdorama]

Just checked. I bought the Cree brand but they were only 15 cents more than the ST's. Either should work well.
John

 

[grindfix]

Does this look reasonable for 6SN7 input stage?

 

[GordonW]

That's somewhat high of a plate resistor value for a 6SN7. And 0.8ma is a bit low plate current, for good performance.

However- I am having problems duplicating your results. I use the Triode/Pentode Loadline Simulator ( https://www.trioda.com/tools/triode.html ) as a pretty reliable simulation tool- it seems to give good results that agree with what I see when I hook up the circuit at the same values. The sim says that with 290v B+, a 220K plate resistor, and a 1200 ohm cathode resistor, you will only wind up with 40v on the plate, with 1.14ma of plate current. To get 0.8ma, you have to go up to a 6.8K or so cathode resistor- which gives only about a gain of 11.2. And, the distortion isn't bad, but it isn't awesome either- with 1v of input, it's about 1% distortion.

Now- if you want to make the distortion lower- and 50v on the plate is enough- then changing the cathode resistor to a 2K, will half the distortion (about 0.5% with 1v input). Gain is about 16.5- not bad, either. But, unfortunately- it probably won't have enough drive voltage on the output of the tube, with only 50v on the plate at idle, to run 6L6s well.

If you can stand a little less gain from the 6SN7- it's possible to make the distortion WAY lower, than even that. A 47K plate resistor and a 560 ohm cathode resistor, will give a gain of about 14- but with only 0.2% or so distortion, and about 110v on the plate at idle. That should drive things much better. Dissipation is only about 0.5 watt- which is completely good for one of these tubes, too...

I've driven 6SN7s and 6CG7s at similar alignments, with good results, in practice. it's possible to get even lower total distortion than 0.2 percent- but at that point, it's at the expense of increasing higher-order distortion (third harmonic and higher) compared to second harmonic. I tend to want the distortion to go down in a monotonic fashion as the harmonic number increases (third harmonic less than second, fourth less than third, etc)- that seems to give the most "musical" and "natural-sounding" results, IME.

Regards,
Gordon.

 

[kward]

Here's what I'd probably do.



Note as Gordon pointed out, there are numerous solutions. Because of the direct coupling, you need 120V plate voltage. I've only shown one of the possible solutions.

You will need to adjust these resistors in the power supply to compensate:



Note I used a voltage divider of 16K and 62K to provide the rail voltage for the 12AX7 in the original schematic. I did that because of the direct coupling of the first stage to second stage--I didn't want the power supply sag to disturb the second stage biasing too badly. But with 2.8 mA quiescent current (per channel) in the new first stage, I think you will be fine with a simple R/C filter stage where both channels are fed from one filter cap. Like this:



So you just need to find new resistor values given the new current flow to the first stage.

 

[grindfix]

I use the Triode/Pentode Loadline Simulator ( https://www.trioda.com/tools/triode.html ) as a pretty reliable simulation tool- it seems to give good results that agree with what I see when I hook up the circuit at the same values.

Thanks for linking this tool Gordon. For practice, I tried to plot 12AX7 and can't come-up with 45x open loop gain posted in Kevin's drawing.
I got plate voltage, plate and cathode resistors right.
Grk shows to be 62x and plate current is 0.88mA. Is it due to each individual tube characteristics and condition? Weaker then bogey tube will probably show lower current and gain for same operating conditions, correct?

Here's what I'd probably do.

Kevin, Thank you!
I plotted your proposed stage and came-up with not exact numbers but very close, I think.
Grk is 12.6 and Plate current is 3.2mA vs. 2.8mA you indicated. Close enough, I think. Will 12.6x open look gain be enough though?

Trying to account for everything to plot in PSUD. What is total EFB consumption? I'm assuming that 3k resistor takes most of the dissipation and MOSFET itself is probably not drawing too much.
So, using simplified dropping resistor PS design per Kevin's suggestion, I'm coming-up with approximately 220mA current draw. (+ whatever MOSFET itself is drawing)
Would you guys double check my math?

With my PT measurements and above referenced load PSUD shows 442v out of choke. Later today I will take PT measurements with variac using 6.3v and 12.6v bucker in mind to see if it will get me closer to needed voltage.

 

[kward]

It depends on how much feedback you want to add. I assumed 12x gain when I previously quoted 0.85V input sensitivity with 12 dB feedback, or about 1.2V input sensitivity with 15 dB feedback. Personally I think that's plenty of gain, if not inching toward the "too much" side.

For the EFB circuit itself, current consumption pulled from the high voltage power supply is negligible at about 1 mA. On the other hand, screen current varies depending on output power. At idle it's about 2 mA per tube (x4 tubes). At max power, while one tube is in cutoff, the other is conducting fully, so screen current is maybe 16.5 mA peak, or about 11.7 mA RMS (x2 channels). All I did to determine that was to glance at the 6L6-GC data sheet, where it plots screen current vs screen voltage vs. grid #1 volts. At full conduction, at screen voltage of 284V and grid #1 is at 0V, I can imagine that screen current is approximately where the red dot is on the graph below (16.5 mA).



The 3K resistor sitting in front of the mosfet drain pin is absorbing most of the voltage drop so that the mosfet doesn't need exorbitant heat sinking. At max power, as shown above, the screens are drawing 11.7 mA * 2 = 23.4 mA. Let's round to 25 mA for remainder of the calculations. The resistor is dropping 25 mA * 3K = 75V. Thus the voltage at the drain pin at full power both channels driven is 320V. Thus the mosfet is dropping 36V at full power, and that represents 0.9 Watt of heat dissipation. So only mild heat sinking of the mosfet is required. I used this heat sink, but you could equally just bolt the mosfet right to the chassis and let the chassis itself act as a heat sink. If you bolt the mosfet to the chassis, make sure you use a silicon insulator pad between the back plane of the mosfet and the chassis, or use a full plastic case mosfet. I used an STmicro full plastic case mosfet with part number as shown on the schematic.

For your PSUD simulation, full current draw of the amp at idle would be approximately:

• Output tubes: 32 mA x 4 tubes (this includes plate and screen current)
• phase inverter: 8 mA x 2 channels
• voltage amp: 3 mA x 2 channels

It might also be useful to model full power consumption to get a feel for power supply sag. The current draw of the output stage when the amp is driven to full power with both channels driven will be about

• Plate current: 130 mA x 2 channels
• Screen current: 25 mA (both channels, from above)

 

[grindfix]

For your PSUD simulation, full current draw of the amp at idle would be approximately:

• Output tubes: 32 mA x 4 tubes (this includes plate and screen current)
• phase inverter: 8 mA x 2 channels
• voltage amp: 3 mA x 2 channels

Thanks for your reply!
I think I got all that accounted for in my simulation. PSUD does not offer rectifiers we've discussed earlier, so some variation is probably unavoidable.
Here are 2 sims. First is 126vac input and second is 123vac input, as my wall shows today. Resistor values are adjusted to keep following stages in check.
Will you let me know what you think?

 

[grindfix]

One other thing I forgot to ask...
Going with SS rectification vs. VT.
1.There's no time delay and plates receive full DC before heaters warm-up and tubes start to conduct. Problem at all?
2. How high of the voltage PS caps will see while heaters are doing their thing? I don't know how to simulate that. No load to full idle load in what period of time?
Feels like 500v cap rating could be close.

 

[kward]

Try rerunning the simulation with "after a reporting delay of" set to 5 seconds. That will give you a better representation of the steady state voltage which you can then read accurately from the RMS column. As well, you can then read ripple right from the Diff column. (Ripple in PSUD is reported as Vpp). As it stands in your current simulation, the RMS readings are an electrical average over the entire simulation run, starting at 0 seconds where voltage is zero, so it isn't showing a lot of accuracy for steady state voltages.

The cold start power supply voltage will be 1.414 * 375V = 530V DC. That voltage will be impressed on all power supply caps (because no current flows while tubes are cold, so no drop will be seen across any of the power supply resistors). So 500V caps are not quite enough. There is probably some surge protection (usually like 50V) built in to good modern electrolytic caps but I think it's pushing it to the brink and eventually could lead to premature death of those caps. I think this issue must absolutely be addressed.

If you can guarantee you will always use 6L6-GC tubes, your existing power transformer will never deliver more DC voltage than the power tubes can handle safely, so you could make the amp work with the higher plate voltages. But note thats approximately 80V more than the original design used, so some further tweaking of the power supply for the first and second stages will be required, as well as probably revisiting the bias supply to guarantee you have the bias/balance voltage swing that will be needed. If that's your direction, I would suggest using series connected power supply caps with voltage equalizing resistors between them, in place of each individual cap in the power supply. But you could also use a different power transformer that has a HV secondary voltage of about 310V to give you the ~400V DC plate voltage that the original design called for. You could also add back in tube rectification and probably get pretty close, and using PSUD to model that might give you some clues if it will get you into the ball park or not.

Whether or not time delayed B+ is beneficial is one of the most controversial topics I've seen on this forum. Consider that if you do a hot restart (flip the power switch off for say 3 to 5 seconds, then back on), you won't see the benefit of the tube rectifier time delay at all, since the cathode will still be hot and immediately conduct when the power is reapplied. So the built in time delay capability of a cold rectifier isn't foolproof anyway.

 

[grindfix]

Here is what I did. My ever max registered wall voltage was 126vac. If I use 12.6v bucking transformer I will get 1.414 * 343v = 485vdc unloaded.I think I can get caps in 600v rating to have some headroom. Unloaded filaments are 6.4v at this input, so I can use this winding for filaments and add 12.6v underneath chassis for bucker.
Are there any negatives against using bucker, other then having additional transformer expense?

"Reporting after 5 sec" image is below. Main rail is 417vrms. Below max ratings. It barks that current pulled voltage below 0. I don't believe it's relevant because tubes are not conducting, correct?

 

[kward]

Beautiful!

Yes ignore those warnings. Not relevant at 0.08 seconds into the simulation. You are getting them because the caps are charging while at the same time the sim is forcing the current sinks to pull their full weight also.

 

[grindfix]

That’s going to be interesting. this 193N choke is bigger then those Stancor transformers. 1650H are larger too.
I was hoping to make this a little more compact then in original Newcomb chassis. Nope! Full size it is! Stuff will have to be moved around.